Computer Design A computer aided design and VLSI approach Paul J. Drongowski Chapter 15 - System engineering considerations. We return to a discussion of system level engineering considerations in this chapter. Packaging, interconnection, power supply, cooling, noise, appearance and manufacturability all affect the ultimate product design. In some cases, the cost and technical aspects of these considerations will also influence the functional (logical) design of the system. Section 1 - Packaging and interconnection hierarchy. Computing systems are based upon physical circuits which occupy space, consume electrical current and generate heat. Thus, the circuits must be arranged and physically secured in space and interconnected. The circuits must be connected to a power source and they must be cooled. Consumer, industrial and military products have some additional requirements including appearance, shielding, weight and size. Over the years, several levels of packaging and interconnection have come into common use (Table 1.) Large mainframe computers consist of one or more "cabinets." A cabinet is usually a so-called "19 inch rack" which is six feet tall and can accommodate chassis that are 19 inches wide (the RETMA standard.) Power is distributed to the chassis via a cabinet power bus which may be separately fused and switched for safety. The side panels are not merely decoration, but channel air through the cabinet for cooling. In a computer room environment, air is forced under a raised floor and into the cabinets through holes in the floor. The cabinet may have a fan at the top to further assist air flow in both forced air and office environments. For liquid cooled machines, the cabinet is also a distribution point between chassis level cooling and external equipment. Level Package ------------------------------------------------------ Cabinet 19 inch rack (power bus, cooling) Chassis Frame (console panel, power, cooling) Backplane Frame Board Printed circuit board Component Discrete or IC package Chip Silicon substrate Table 1 - Packaging and interconnection hierarchy. A typical "chassis" consists of a heavy duty mounting frame to which one or more backplanes, a console panel, power supply and additional cooling equipment are attached. The console holds any switches or displays which must be readily accessible to an operator. Appearance is important as operator fatigue can be reduced through the careful placement of controls and by making legends and displays as readable as possible. Chassis are interconnected by external cables or in some instances, by carefully placed backplane to backplane connectors. Connection to physically isolated peripheral, laboratory or communication equipment is also made by external cabling. Cables may be connected to either the backplane or to printed circuit boards within the backplane. Connectors (plugs and sockets) must guarantee a reliable mechanical and electrical connection between the subsystems. Thus, the connectors used in high vibration environments (industrial and military applications) are often expensive. Connectors and cables are also a good source of noise as radiated and received by the system. Chassis level power must be carefully regulated. The building (wall) current must be converted from AC to DC with very little noise and ripple. Logic circuits are designed to tolerate moderately low voltage levels (4.5 volts minimum for standard 74-series TTL.) High frequency noise, however, can severely disrupt circuit operation. When a power supply is overloaded, the supply voltage will drop. The amount of voltage drop per unit of current is the "compliance" of the power supply. Clearly, high compliance and current supplies are more expensive than low compliance, low output units. Size and weight are also important in applications such as airborne electronics and consumer products. Choices for chassis cooling include (in order of increasing cost) air convection, forced air, liquid and cryogenic methods. Of course, chassis and cabinet cooling design must be compatible. A "backplane" provides a physical mounting and electrical connection structure for the next lower level of the hierarchy, "printed circuit boards" (PCB.) The PCB's slide into backplane slots which give mechanical rigidity to the boards. Large PCB's (greater than 12 inches on a side) will flex and warp creating open circuits in the process. The edge connector and slot guides keep the boards from flexing while they are inserted in the backplane frame. One style of backplane is the "motherboard." In this style, the edge connectors are mounted on a PCB where wire traces establish interboard connections. The motherboard may include active (or passive) bus termination to reduce noise, bus arbitration logic, and sometimes even system memory, processors, or I/O circuits. (This latter style is often found in personal computers.) Backplane wiring may also be made using "wire wrap." Each PCB edge contact is brought out to a four sided post. A thin wire is wrapped around the post making a mechanical and electrical connection. Wire wrap permits field modifications as wires can be removed or added to the backplane. Printed circuit board connections are established through either wire wrap or the now familiar etched wires. When wire wrap is used, integrated circuit packages and discrete components are mounted in sockets where each component pin is connected to a post. Wires can be wrapped by hand or machine. Manual wrap is suitable for prototyping or very low volume production runs. Numerical control wrap machines make high volume runs economically feasible by automating a very time consuming (and error prone) task. Wire traces are created on PCB's by selectively etching away undesired metal. Early boards had connections an only one or two surfaces of the board. Two sides proved to be inadequate for high density, VLSI-based systems. Multilayer boards are in common use with several signal layers, ground planes to control noise and layers for power distribution. Connections between layers are formed via "plated through holes." Holes are drilled through the sandwich and are plated with metal. A connection is made wherever a trace is brought to a hole. Signal and power distribution noise must be controlled at the board level as well as at the backplane. Ground planes and passive signal termination (resistors) are two common techniques. Twisted pair connections are often used with emitter coupled logic (ECL) to limit transmission line noise due to very steep rise and fall times (less than one nanosecond.) Decoupling capacitors must be placed in parallel between the positive and ground supply rails to eliminate noise. Until the late 1970's, only a few styles of component packaging were in common use. The most prevalent of these is the "dual in-line package" or "DIP." The DIP consists of a plastic or ceramic chip carrier (the "body") with two rows of pins arranged down either side of the package. The chip is bonded to the carrier and is sealed against moisture and contaminants. The package carries heat away from the chip substrate to the air surrounding the package or to the liquid cooling system. The DIP pins are brought to the edge of the chip where microscopic wires are bonded to the pin leads and on-chip pads. The demand for more off-chip connections has led to a large variety of packaging styles. Here are three examples. * "Quad plastic molded package." The quad package is similar to the DIP except that pins extend from all four sides of the package. * "Pin grid array (PGA.)" Instead of pins located at the edge of the package, PGA pins extend from the base of the package in a two dimensional array. * "Surface mount." Board connections are made using "fingers" which soldered to the surface of the PCB. The fingers do not penetrate the surface of the PCB. Modern packaging schemes must be compatible with wave-soldering equipment and other high volume production techniques. It will be difficult to displace the DIP for this reason because most automatic insertion machines have been designed to accommodate this type of package. Passive components (e.g., resistors and capacitors), displays and switches are available in DIP form and can be inserted using the same equipment. At the chip level, wires and transistors are borne by the circuit substrate. Semiconductor material is arranged into layers of signal bearing and insulating material. Wires and transistors are etched into this material. Off-chip connections are made through large bonding pads (about 100 microns on a side.) By standardizing the position of the bonding pads, automatic wire bonding equipment can be used to make the interconnections between the pads and the package leadframe, a process once performed by hand. Section 2 - Special situations. Every market has special packaging and engineering considerations. The consumer market, for example, is particularly sensitive to appearance and cost. Products must comfortably sit on a desk top and look pleasing (or futuristic!) Thus, the chassis, boards and power supply must be physically small. Cooling fans are considered noisy and therefore convection cooling is desirable. Therefore, low component count, current consumption and heat dissipation are important design criteria. Consumer items must also pass Federal Communication Commission requirements on radio frequency interference (RFI.) Shielding must be added to control RFI emissions with careful attention to connectors which often leak RF noise. Convenience features such as a clock, channel selection values, etc. must be retained even when power is turned off. Battery back-up or electrically alterable ROM may be required for memory. Industrial process control equipment operates in a very stressful environment. A factory floor is poorly cooled, is full of noise throughout the electromagnetic spectrum and power distribution system, and has clumsy operators and delivery personnel who drop sensitive equipment. Thus, an industrial system must have a well-regulated power supply, thick shielding against noise, cooling fans and mechanical protection against abuse and vibration. Military systems must often operate in hostile environments full of dirt, moisture, extra hot or cold and electromagnetic noise. Portable equipment is battery operated requiring low current consumption. Resistance to vibration and physical abuse are particularly important. To prevent the unauthorized interception of military information, systems must be shielded and satisfy TEMPEST requirements. Fiber optics is becoming an important technology for high speed, secure communication. Airborne electronics (avionics) is especially challenging since weight and size must be minimized. Ruggedized packaging (ATR) is required. Unusual power standards (120 volts at 400 Hz) must be satisfied. Packaging must also support the use of automatic test equipment and module level replacement and repair. Section 3 - Effect of packaging and interconnection. Packaging, interconnection and power concerns have an immediate effect upon the engineering design including the logical structure and behavior of the system. The physical nature of the interconnections in the system directly affect performance. * Every wire has a capacitance which must be charged or discharged. The output of every gate must be designed (sized) to drive the expected maximum capacitive load at that output with an acceptable delay time. * Time will be required for a signal to equalize across a wire. A wire can be modeled as a chain of infinitesimal resistors (in series along the wire) and capacitors (in parallel.) This "diffusion delay" is proportional to the square of the wire length and also depends upon the RC product of the wire. Due to these effects, the time to communicate information across space (i.e., through a wire) is very sensitive to the distance between the sender and receiver and the transmission (drive) capability of the sender. In the 1950's, the delay incurred by system wiring could be safely ignored. Switching delays were on the order of 1 to 10 microseconds and a few nanoseconds of wire delay were insignificant. Wire delay simply cannot be ignored in high performance designs with clock speeds in the range of 10 to 20 nanoseconds. In the design of the Cray-1, wire lengths were padded out or kept to a minimum of one nanosecond for a 12.5 nanosecond clock period. Another problem occurs between the microscopic scale of integrated circuit operation and the macroscopic scale of the board level and above. Short distance on-chip wiring has a capacitance in the -3 range of 10 to 100 * 10 pF range. Short wires (nMOS technology) can be driven in roughly 10 nanoseconds using minimum dimension transistors. Off-chip capacitances, however, are on the order of 10 to 100 pF -- at least three orders of magnitude greater. With minimum transistor sizes and current sourcing/sinking capability, delay times will be at least 1000 times longer. Thus, larger transistors (more space, current and heat) will be required to drive a signal off-chip with a 10 nanosecond delay. Long on-chip wires (.1 to 1 pF), like the clock in a synchronous design, are also problematic. The designer has a tremendous incentive to carefully partition the system behavior, structure and physical characteristics for maximum performance. There is a reward for maximizing locality and for performing as much computation as possible on-chip while minimizing the frequency of off-chip communication. Compact chip layouts must be found to keep on-chip wires as short as possible and to improve production yield. The designer is penalized for going off-chip by long communication delays, by additional package pins and board level connections, and by large and power hungry drive transistors. Poor design will result in large, low yield chips, greater board area (and possibly more boards, etc.) due to lower integrated circuit density, and higher power supply and cooling costs due to greater power demands. Copyright (c) 1987-2013 Paul J. Drongowski