VLSI Systems #1
System design space
P.J. Drongowski

What is a system? The usual academic definition is "a physical object
which performs some computational function.

The system life cycle can be divided into three phases:
  * Development.
  * Manufacture.
  * Maintenance.

System costs during the development and manufacturing stages
belong to one of two categories:
  * Non-recurring: Costs which are incurred once when the system
    is designed. Non-recurring costs can be amortized during
    production. Large volume production increases the rate at
    which non-recurring costs can be amortized.
  * Recurring: Costs directly related to the production of
    deliverable systems. Recurring costs include material, labor,
    and capital.

The selling price of a system is the sum of the recurring,
per-unit cost of producing the system, the non-recurring
development cost of the first system, and a reasonable profit.
To complicate matters, systems are often designed against a
subjective scale of performance versus selling price which is
largely determined by the marketplace. Production volumes,
amortization rate and desired market price will constrain
development costs and will certainly affect certain engineering
decisions.

Maintenance costs are usually paid by the customer. However, if a
product has a poor or expensive maintenance record, customers will
not buy the system.

Computer scientists tend to dwell on the logical behavior of
information processing systems without considering the economics
of the system life cycle. But, engineers who prepare
products for the marketplace cannot ignore certain recurring
and non-recurring costs and cost related factors.

  * Non-recurring.
    + Schedule.
    + Prototypes.
  * Recurring.
    + Mechanical.
      - Printed circuit board size, number of circuits per board.
      - Size and number of card slots in backplane.
      - Cabinets.
    + Cooling.
    + Power supply.
      - Generation.
      - Distribution.
    + Interconnection with other systems.

Schedule. Time is money. Although an engineer's salary may be
$30,000 per year, a burdened person-year may be as high as
$70,000 for that same engineer. Schedule can only be reduced
by making the engineering team more productive (i.e., to increase
output per day) through improved design tools and techniques.
A longer schedule will slow the amortization rate of development
costs and may make the selling price of the product uncompetitive.

Prototypes. Construction of a working prototype can be an
expensive effort. Simulation can reduce prototyping costs by
providing a soft testbed for system ideas.

Mechanical. Every level of mechanical design (e.g., pin, circuit
pack, board, backplane, cabinet) has some fixed cost associated
with it. Generally, if more logical function can be packed within
a physical unit, these fixed costs will be reduced.

Cooling. Electrical systems do work and generate heat. This heat
must be removed to prevent permanent damage to the system. Convection
air cooling is the least expensive, forced air cooling is next, and
fluid cooling is by far the most expensive method. Some circuits
may require special packages to dissipate heat.

Interconnection. Wires and backplane interconnections increase the
capacitance along signal paths, and hence, increase switching time.
Minimizing wire length and backplane connections will reduce
switching times by reducing interconnection capacitance.

Maintenance. Systems break. There is a trade-off between the time
it takes to isolate a problem and part replacement. The more components
there are in a system, the more likely something will malfunction.

VLSI technology is a major advance since it reduces almost every
major recurring system cost.

  * Basic production costs (per chip) are relatively low.
  * Mechanical. More functionality can be accommodated in smaller
    packages (chips) reducing board area, the number of PC boards,
    backplane interconnections, and cabinets.
  * Interconnection. If locality can be successfully exploited,
    on-chip interconnection capacitances are much lower than off-chip
    wire capacitances. Hence, circuits can switch faster.
  * Power supply. Since on-chip interconnection capacitances are lower,
    less power is required to charge/discharge wires. Hence, power
    consumption is lower.
  * Cooling. Lower power consumption may reduce system level costs
    for cooling. Higher circuit and current densities, however, may
    create a need for special cooling arrangements to prevent thermal
    damage to the individual chips.
  * Interconnection. Interconnection at the package, board and
    backplane levels will be reduced. The wires are not completely
    eliminated, making the interconnection of active circuitry on
    the individual chips more difficult.

Other opportunities arise.

  * Since circuits can be produced inexpensively in volume,
    large numbers of processing and memory elements can be
    combined into extremely powerful configurations.
  * Design becomes more flexible. Logic enhanced memories (LEM's)
    which combine logic and memory together are particularly
    attractive since they are dense and fast.
  * Chip replacement maintenance and repair strategies become
    feasible. Further, redundant resources can be designed into
    a system to replace defective components on the fly.

Non-recurring development costs are a problem.

  * Prototyping is very expensive. Simulation is a necessity.
  * Circuit layout (i.e., the spatial arrangement of the active
    circuitry) and wire routing are difficult and expensive design
    tasks.
  * Partitioning into function blocks is more difficult since
    relatively high or low wire capacitances can greatly affect
    system performance.

  => Most systems today work "correctly" the first time with
     respect to pure logical (0 and 1 behavior.) They usually
     do not operate fast enough, however.
  => This is why computer aided design (CAD) of VLSI systems
     is a hot topic!


Technological alternatives in the design space.

  => Quick! What is the cheapest way to take advantage of
     VLSI technology? Answer: Buy a "high tech" part from
     your distributor.

  Custom. Chip area is totally uncommitted. Design primitives
  are transistors and wires. Custom has the maximum design
  flexibility. Cost effective in very large
  volumes due to high (non-recurring) design costs.

  Standard cells. Pre-designed logic circuits are stored in a
  computer-based library of standard cells. Chip area is
  uncommitted. Placement and routing may be partially automated.
  Libraries include PLA's, RAM, ROM, and even basic processors.

  Gate arrays. Chip geometry is predefined with a core of gate
  templates surrounded by interface circuits and pads. The gate
  templates are programmed using one or two mask layers (usually
  metal.) Can be used for random logic replacement.

  Fuse programmable logic arrays. Field programmable circuits
  are available off-the-shelf, usually implement a combinatorial
  function. Good for random logic replacement.

  Customization hierarchy

	  		% of wafer	Development	Prototype
	  Technology	pre-processed	cost/chip	lead time

	  Full custom	    0%		$50K-$250K	9-18 months
	  Standard cell     0%		$30K-$90K	4-6 months
	  Macro cell	    80%		$15K-$40K	3-4 months
	  Gate array	    80-90%	$5K-$20K	1-2 months
	  Fuse programmable 100%	None		Off the shelf

Copyright (c) 1984 Paul J. Drongowski