VLSI Systems #2
Top-down design considerations
P.J. Drongowski
System organization.
Register transfer systems.
* Classical synchronous state machine with inputs, outputs
and memory. (Draw state machine with feedback.)
* Normally, engineers draw block diagrams that depict the
datapaths, combinatorial logic, registers and a controller.
(Use a simplified PDP-11/40 block diagram as an example.)
* Information is modified by data operators (combinatorial
logic) and is enabled into registers (memory) under the
the control of a synchronous finite state machine.
* In MOS systems, a two phase, non-overlapping clock is
used for control. The first phase enables information
through the combinatorial logic. During the second phase,
the outputs of the combinatorial logic are stored in the
registers. (Phi-1 supports precharge or bootstrap logic.
Phi-2 is how we normally use a clock in a TTL design.)
Building blocks.
* Programmable Logic Arrays (PLA.)
* Registers.
+ Static versus dynamic.
+ Half registers.
+ Simple registers and register files.
* Finite state machines (FSM.)
+ PLA-based.
+ ROM-based.
* Data operators.
+ Multiplexers.
+ Arithmetic logic units (ALU.)
+ Adders, etc.
* RAM.
+ Static.
+ Dynamic.
* Interface.
+ Inputs.
- Static protection.
- Level conversion.
+ Outputs.
+ Tristate.
* Clock generator.
Trade-offs and design considerations.
Locality/communications
Regularity/density
Yield
Speed/space/power
Methodology and design tools.
The design methodology to be used in this course is a mixture
of top-down and bottom-up design. Top-down design should be
used in the early design stages as a problem solving aid and
to choose a rough floor plan for the system. Bottom-up design
will demonstrate if a particular design is technologically
feasible (e.g., can be laid out and interconnected, consumes
and dissipates reasonable power levels, delays are not
excessive, etc.) Both top-down and bottom-up design will involve
the orthogonal concepts of representation and refinement.
Representation. Translation from one form of description in a
particular notation to another form or notation. The translation
may involve a change of terms, for example, translating from
a register transfer (RT) description to a logic diagram.
A representation can be characterized by its terms (primitive
items of discourse), composition rules (permissible combinations
of terms and other compositions) and constraints (conditions which
must be satisfied.) Ideally, a syntax and semantics
can be formally specified for the representation. The syntax should
not permit illegal compositions (constraint violations)
to be expressed in a description. Such a philosophy will catch as
many errors as possible through simple syntactic checks.
Refinement. In top-down design, refinement is the decomposition
of system functionality into smaller, more manageable units. In
the bottom-up direction, it is the composition of fundamental
or simpler units to perform more complicated system functions.
Representations.
Level Interpretation
----- --------------
Architecture Specification of desired system behavior.
Organization How to implement that behavior with building blocks.
Logic Implementation of building blocks as logic circuits.
Device/geometry Implementation of logic circuits with MOS transistors.
Design tools.
Representation Tool Terms
-------------- ---- -----
Architecture N.mPc Processors/ports
Processes
Registers/memory
Procedures/functions
Register transfers
Organization N.mPc Processors/ports
Processes
Registers/memory
Functions
Register transfers
Logic RSIM Cells (circuit macros)
Transistors
Geometry Caesar Cells
Rectangles
Lyra Cells
Rectangles
Device Spice Transistors
Capacitors/resistors
Miscellaneous design tools.
Tool Purpose
---- -------
crystal Critical path timing analysis
mextra Geometry to RSIM translation
sim2spice SIM format to Spice translation
mkpla Programmable logic array (PLA) generator
eqntott Logic equation to mkpla input format
cif Geometry display and hard-copy
Copyright (c) 1984 Paul J. Drongowski