Computer design

The syllabus below describes a one semester undergraduate course about computer design. I taught this course for several years at Case Western Reserve University to junior year computer engineering and computer science students.

The course was preceded by a one semester, prerequisite course on combinational and sequential logic. Students were expected to know about the operation of logic gates and flip/flops, and to be able to design low-complexity digital circuits. The computer design course significantly increased system scale while concentrating mainly on instruction set architecture (ISA) and implementation. This course is to hardware design as software engineering is to software development.

There are two important practical aspects. First, students need to appreciate the role of customer/marketplace requirements and technology. Computers are not designed in a vacuum and must meet cost, speed, space and power requirements. The design is driven by the available technology. Second, design and testing are coequals and designs must be validated. Further, hardware systems require design for testability features.

The course below follows a method which successively maps a higher-level representation of a machine into the next lower-level representation:

  • Instruction set architecture (abstract behavior) to organization
  • Organization (register transfers) to logic-level implementation
  • Logic-level implementation to CMOS circuits

Students must build a formal model at each level of representation. The ISA is specified and validated in C language. The organization is described and validated in stylized C which mimics the datapath and controller. The logic-level implementation is modeled and simulated as a gate- or switching transistor-level network. CMOS circuit blocks are laid out in a floor plan.

The course brings students to the threshold of VLSI systems. In fact, many students went on to the VLSI systems course as seniors. My VLSI systems course used some of this same material (modularity, synthesis, testing) to bring entry-level graduate students up to speed with my approach and philosophy of system design. Electronics and device physics are deemphasized because the students were computer science-oriented, not electrical engineering-oriented. Plus, our goal was to train “tall-thin” designers in the Mead/Conway sense of the term.

The syllabus below links to two different kinds of course material. Links in the left column point to the first draft of my textbook on computer design. The chapters and topics are arranged in presentation order. Links in the right column point to (rather busy) slides. Occasionally, a figure is missing in the text — there is only so much you can draw with ASCII characters! The missing figure can be found in the companion slides.

I eventually changed my teaching style to a Socratic method and stopped relying on detailed slides during lecture. Today, I think I would present the key diagrams from the slides and stir up discussion instead.

Chapter topic Slides and figures
The marketplace
Computer architecture
ISA modeling ISA behavioral modeling
Introduction to testing System and circuit testing
ISA validation
Design methodology Modularity, control, timing
Building blocks System building blocks
Datapath synthesis Datapath synthesis and style
Control representation Control and microprogramming
Design style Datapath synthesis and style
Small example: Multiply step machine Multiply step machine
Speed, space and power estimates Speed, space and power estimation
Microprogramming Control and microprogramming
Example: PDP-11/40E PDP-11/40E datapath and microprogramming
Modeling the organization
System considerations Packaging and interconnection
Implementation technology Technology
CMOS circuits Introduction to CMOS circuits

In case you’re wondering, input/output was covered in a separate undergraduate course that combined operating systems and computer architecture. That is a an effective combination, by the way, because operating systems live at the software/hardware interface and topics like interrupts and interrupt handling can be addressed in an integrated fashion. Here are three moldy, sketchy notes about I/O: I/O buses, I/O bus transactions, and DMA and interrupts.

At first glance, the PDP-11 example appears outdated. However, few modern machines are described to this depth. The PDP-11 series was manufactured in an era when a computer arrived with a maintenance manual and schematics, not a toll-free customer service phone number. A customer could, plausibly, diagnose and repair a hardware problem in the field. These documents were a terrific educational resource. I learned a tremendous amount about machine design by studying the internals of the PDP-11/40 and the PDP-10. The PDP-11/40E was enhanced by a writeable control store and allowed end-user microprogramming. Thus, a programmer could extend the PDP-11 instruction set or even emulate other machines. The PDP-11/40E has a straightforward datapath and control organization. All in all, this was a great education!

The sections on complexity and technology need a serious update, however. There are many technological options beyond standard cells, gate arrays, semi-custom and full custom. One very important option is the use of very large-scale intellectual property (IP) blocks to assemble a system on a chip (SOC). ARM have a terrific, commercially successful approach and would be a good IP-based technology to study.

One should also consider making FPGA as the ultimate implementation target for course projects. The Papillio board makes it relatively easy and inexpensive to use Xilinx Spartan FPGAs. This approach might require a change in organization-level modeling language. Instead of stylized C/C++, Verilog or VHDL are more appropriate. These languages would certainly make it easier to target Papillio/Spartan. However, students would need to learn another language, possibly increasing time pressure beyond reason.